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KEYNOTE: Edge of Chaos Kernel -- Sine qua non of all Intelligent ICs (Tentative)

Leon Chua (Life Fellow, IEEE) is widely known for his invention of the memristor and the Chua’s circuit. His research has been recognized internationally through numerous major awards, including 17 honorary doctorates from major Universities in Europe and Japan, and seven U.S. patents. He was elected as a Foreign Member of the European Academy of Sciences (Academia Europea), in 1997, the Hungarian Academy of Sciences, in 2007, and an Honorary Fellow of the Institute of Advanced Study at the Technical University of Munich, Germany, in 2012. He was a recipient of many major prizes, including the Frederick Emmons Award, in 1974, the IEEE Neural Networks Pioneer Award, in 2000, the First IEEE Gustav Kirchhoff Award, in 2005, the International Francqui Chair, Belgium, in 2006, the Guggenheim Fellow Award, in 2010, the Leverhulme Professor Award, U.K., from 2010 to 2011, and the EU Marie Curie Fellow Award, in 2013. In 2002, he was also a recipient of the Top 15 Most Cited Authors Award from all fields of engineering, from the Current Contents (ISI) database, published during the ten-year period, from 1991 to 2001.

Talk title: Edge of Chaos Theory Explains Complex Phenomena in Memristor Circuits

Alon Ascoli (IEEE member) received a Ph.D. Degree in Electronic Engineering from University College Dublin in 2006. From 2006 to 2009 he worked as RFIC analog engineer at CSR Sweden AB. From 2009 to 2012 he was Research Assistant in the Department of Electronics and Telecommunications at Politecnico di Torino. Since 2018 he is Scientific Collaborator with the Department of Microelectronics, Brno University of Technology, Brno, Czech Republic. Since 2012 he is Scientific Collaborator in the Faculty of Electrical and Computer Engineering, Technische Universität Dresden, where he is currently pursuing a Habilitation in Fundamentals of Electrical Engineering. His research interests lie in the area of nonlinear circuits and systems, networks of oscillators, Cellular Nonlinear Networks and memristors. Dr. Ascoli was honored with the International Journal of Circuit Theory and its Applications (IJCTA) 2007 Best Paper Award. He is the President of the Cellular Nanoscale Networks and Array Computing Technical Committee (CNNAC-TC) since May 2019. In April 2017 he was conferred the habilitation title as Associate Professor in Electrical Circuit Theory from the Italian Ministry of Education. Since 2014 he is Management Committee Substitute for Germany in then COST Action IC1401 MemoCIS “Memristors – Devices, Models, Circuits, Systems, and Applications”. He has been Program Chair and Special Session Chair for the 15th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA) in 2016. He is the Technical Program Chair for the International Conference on Memristive Materials, Devices, and Systems (MEMRISYS) 2019.

Talk title: Memristive devices

Since 2017, Heidemarie Schmidt is Professor for Solid State Physics and Quantum Detection at FSU Jena and Head of the Research Department Quantum Detection at the Leibniz-IPHT, Jena. Her research areas span: detectors for application in the life sciences and medical technology: impedance biochips; cryogenic single photon detectors for applications in quantum optics, safety, and security; high-sensitivity, robust detectors and detector systems for applications in life science, medical technology, and environmental monitoring: IR sensors; AI hardware with analog and digital functionality for application in neuromorphic computing, sensor-near data analysis, and trusted electronics: analog, electroforming-free memristors and digital, electroforming-free memristors; light-matter interaction in external fields: magnetooptics and electrooptics; bound magnetic polaron formation in transparent oxide thin films: magnetotransport.

Talk title: Analog Memristive Computing

Alex James received the Ph.D. degree from the Queensland Micro and Nanotechnology Centre, Griffith University, Brisbane, QLD, Australia. He works on brain-inspired circuits as well as algorithms and systems. He is a Professor with a research specialization in the area of AI hardware, intelligent imaging and analog electronic systems at Digital University Kerala. He is actively engaged in research commercialization and startups; and in-charge of Maker Village. He is a mentor to several tech startups and co-founded companies in machine learning and computer vision. He has authored several peer-reviewed publications and is a reviewer to international journals and conferences such as IEEE ISCAS, IEEE ICECS, TCAS, TVLSI, TCAD, TCyb, TEC, and TIP. Dr. James has been the founding chair for IEEE Kerala Section Circuits and Systems Society and Executive Member of IET Vision and Imaging Network. He is a member of IEEE CASS Technical committee on Nonlinear Circuits and Systems. He was an editorial member of Information Fusion, Elsevier, and is an Associate Editor for IEEE ACCESS, IEEE Transactions on Emerging Topics in Computational Intelligence (2017-18) (Guest associate editor), and IEEE Transactions on Circuits and Systems 1 (2018-present). He is a Senior Member of IEEE, Life Member of ACM, Senior Fellow of HEA, Fellow of British Computer Society (FBCS), and Fellow of IET (FIET

Talk title: Neuromorphic Engineering 2.0: AI for Edge Computing

Arindam Basu (Senior Member, IEEE) received the B.Tech. and M.Tech. degrees in E & ECE from IIT Kharagpur, Kharagpur, India, in 2005, and the M.S. degree in Mathematics and the Ph.D. degree in ECE from the Georgia Institute of Technology, Atlanta, GA, USA, in 2009 and 2010, respectively. He joined Nanyang Technological University, Singapore, in 2010, where he was a tenured Associate Professor. He is currently a Professor in the Department of EE in City University of Hong Kong. His research interests include bio-inspired neuromorphic circuits, non-linear dynamics in neural systems, low-power analog IC design, and programmable circuits and devices. Dr. Basu received the Best Student Paper Award from the Ultrasonics Symposium in 2006, the Best Live Demonstration at ISCAS 2010, and the Finalist in the Best Student Paper Contest at ISCAS 2008. He was named in the Georgia Tech 40 under 40 alumni class of 2021. He also received the MIT Technology Reviews inaugural [email protected] Award in 2012, for being among the top 12 innovators under the age of 35 in Southeast Asia, Australia, and New Zealand. He received the Prime Minister of India Gold Medal from IIT Kharagpur in 2005. He was a Distinguished Lecturer of the IEEE Circuits and Systems Society from 2016 to 2017.

Talk title: Recent Advances in Spike-Based Deep Learning Algorithms

Vishal Saxena (Member, IEEE) received the B.Tech. degree in electrical engineering from the Indian Institute of Technology, Madras, in 2002, and the M.S. and Ph.D. degrees from Boise State University, ID, in 2007 and 2010, respectively. He is currently an Associate Professor with the Electrical and Computer Engineering, University of Delaware, where he directs the Analog Mixed-Signal and Photonic Integrated Circuits (AMPIC) lab. His research interests include CMOS photonic interconnects, RF and mmWave photonic ICs, data converters, and neuromorphic computing and low-power circuits for Edge-AI. He was a recipient of the 2015 NSF CAREER, 2016 AFOSR Young Investigator Program (YIP), and 2019 DARPA Young Faculty Award (YFA) awards. He currently serves on the steering committee of the IEEE MWSCAS Conference and ISCAS VLSI Committee. He was an Associate Editor for the IEEE Transactions on Circuits and Systems II from 2013 to 2015 and from 2017 to 2019.

Talk title: Photonic neural networks

Harish Bhaskaran is a Professor of Applied Nanomaterials at Oxford University. He is interested in research at the intersection of nanomaterials and nanoengineering to create new nanotechnologies. Nanotechnology is a large field but engineering devices and systems that can both advance our knowledge in this field as well as use this knowledge to be creative and innovative is what truly interests me. He leads the Advanced Nanoscale Engineering Group which has recently focused on some key technologies: 1) Use of optoelectronic materials to create photonic brain-inspired computing and displays 2) Additive manufacturing techniques to take such photonic devices into the manufacturing realm – particularly for emerging “smart-manufacturing” initiatives where embedded intelligence is required. 3) Range of nano mechanical systems that employ novel functional materials - are there good reasons to do this and can we learn something new from doing this? 4) More recently, we are exploring the use of our photonic technologies for applications in biochemistry and diagnostics. His work is supported by an EPSRC Fellowship in Manufacturing and several other research grants including leading the £3.1 million Wearable and Flexible Technologies Collaboration (WAFT), which includes 15 industrial partners as well as the EU’s Horizon 2020 grant FunComp. Our (DPhil students and Postdoctoral Researchers) work has been featured widely over the last several years in Science, Nature, Economist, MIT Technology Review, Fortune, Wired etc. We are also active innovators, with several patents at Oxford, some of which have been commercialized via a spinout company, Bodle Technologies. He is a Chartered Engineer (CEng), Fellow of the Institution of Mechanical Engineers (FIMechE), Senior Member of the IEEE and a Fellow of the Higher Education Academy (FHEA). He is also a Royal Society Research Grants Committee Member, and serve on the steering committee of the European Phase Change and Ovonics Symposium (E\PCOS), as well as the Microsystems and Microengineering Europe (MME).

Talk title: Sensors for network integration

Bhaskar Choubey (SM’11) received the D.Phil. degree from the University of Oxford as a Rhodes Scholar, and the B.Tech. degree from the Regional Engineering College, Warangal, India. He is currently the Chair of Analogue Circuits and Image Sensors with Siegen University. In the past, he has served with the University of Glasgow, Somerville College, and the University of Oxford. Prof. Choubey has received the IEEE Sensors Council GOLD Early Career Achievement Award and the Myril B. Reed Best Paper Award from the IEEE Midwest Symposium of Circuits and Systems. He is currently the Chair of the IEEE EPPC Working Group on ICT in Europe. He is an Associate Editor of the IEEE Sensors Journal.

Talk title: In-memory Computing

Abu Sebastian received his B. E. (honors) degree in electrical and electronics engineering from the Birla Institute of Technology and Science, Pilani, India, in 1998 and his M.S. and Ph.D. degrees in electrical engineering from Iowa State University, Ames, in 1999 and 2004, respectively. He is a principal research staff member and master inventor at IBM Research Zürich. He was a contributor to several key projects in the area of storage and memory technologies and currently leads the research effort on in-memory computing at IBM Research Zürich. He is a corecipient of the 2009 IEEE Control Systems Technology Award and the 2009 IEEE Transactions on Control Systems Technology Outstanding Paper Award. In 2015, he received a European Research Council Consolidator Grant.

Talk title: Memory centric computing

Manan Suri leads the NVM and Neuromorphic Hardware Research group at IIT-Delhi. His research interests include Semiconductor Non-Volatile Memory (NVM) Technology and its Advanced Applications (Neuromorphic, AI, Security, Computing, Sensing). Dr. Suri has been globally recognized as a leading DeepTech Innovator. He was selected by MIT Technology Review as one of the world's Top 35 Innovators under the age of 35 (MIT-TR 35 Global List - 2018) and Top 10 Indian Innovators under 35 (MIT-TR 35 India List - 2018). Dr. Suri received the prestigious IEEE EDS Early Career Award (2018), Young Scientist Award (2017) from The National Academy of Sciences, Young Engineers Award (2016), from The Institution of Engineers, and Laureat du Prix (2014) from the French Nanosciences Foundation. Dr. Suri has filed several patents, authored 80+ publications, delivered 60+ Invited talks, and led 10+ sponsored research projects/consultancies as principal investigator. Dr. Suri is the founder of IIT-Delhi Deeptech startup CYRAN AI Solutions which has developed multiple innovative technology products and solutions. He also serves as an advisor to leading AI/NVM Hardware companies and government bodies. Dr. Suri was a visiting scientist at CNRS, France. In past, he has worked at NXP Semiconductors, Belgium as a Senior Scientist and CEA-LETI, France. Dr. Suri received his PhD from INP-Grenoble, France and Masters/Bachelors from Cornell University, USA.

Talk title: Memristive computing

Dhireesha Kudithipudi (Senior Member, IEEE) is a professor and founding director of the AI Consortium with the University of Texas, San Antonio and Robert F McDermott chair in engineering. Her research interests include neuromorphic AI, low power machine intelligence, brain-inspired accelerators, and use-inspired research. Her team has developed comprehensive neocortex- and cerebellum-based architectures with nonvolatile memory, hybrid plasticity models, and ultra-low precision architectures. She is passionate about transdisciplinary and inclusive research training in AI fields. She is the recipient of the Clare Booth Luce Scholarship in STEM for women in highered (2018) and the 2018 Technology Women of the Year in Rochester.

Talk title: Intelligent chip applications in biomedial

Chacko John Deepu (S’07–M’14–SM’15) received the B.Tech. degree in electronics and communication engineering from the University of Kerala, India, in 2002, and the M.Sc. and Ph.D. degrees in electrical engineering from National University Singapore, Singapore, in 2008 and 2014, respectively. His research interests include low power biomedical circuit design, energy efficient signal processing, and wearable healthcare devices. He was a recipient of the Institution of Engineers Singapore Prestigious Engineering Achievement Award (2011), the Best Design Award at the Asian Solid State Circuit Conference (2013), and the IEEE Young Professionals, Region 10 Individual Award (2013). He has served as a member of the Technical Program Committee for the IEEE conferences ASICON 2017 TENCON 2016. He is a reviewer of several IEEE journals and conferences and serves as an Associate Editor for the IEEE Transactions on Biomedical Circuits and Systems.

Talk title: Brain-inspired learning and computation using Spiking Neural Networks

S. Mostafa Rahimi Azghadi graduated with a Bachelor’s Degree in Computer Engineering (majoring in hardware) with the first class rank in 2006 and obtained his Master of Engineering in Computer Architecture with first class honours and commended thesis, from Shahid Beheshti University (SBU), Tehran, Iran, in 2009. In 2010, he was awarded an Australian International Postgraduate Research Scholarship (IPRS) and the Australian Postgraduate Award (APA) to pursue his PhD in the School of Electrical & Electronic Engineering, The University of Adelaide. In 2014 he completed his PhD with Dean's commendation for doctoral thesis excellence with a thesis entitled "Neuromorphic VLSI Designs for Spike Timing and Rate-based Synaptic Plasticity with Application in Pattern Classification" earning the Doctoral Research Medal, as well as the Adelaide University Alumni Medal, which is awarded to only one alumnus annually. In 2012 and 2013, he was a visiting PhD student in the Neuromorphic Cognitive System group, Institute of Neuroinformatics, University and Swiss Federal Institute of Technology (ETH) Zurich, Switzerland, hosted by Prof. Giacomo Indiveri. From 2014 to 2015, Dr Rahimi was a postdoctoral fellow in a joint industry-university project between The University of Adelaide and Australian Semiconductor Technology Company (ASTC), working in the area of smart sensors for biomedical applications. From 2015 to 2016, Mostafa was a postdoctoral fellow at the University of Sydney School of Electrical and Information Engineering, where he researched in the area of VLSI design and VLSI interfaces for nanoscale sensors. In 2016, Dr Rahimi joined JCU as a continuing lecturer (assistant professor), where he is currently involved in teaching and research in the areas of neural-inspired computing, embedded system designs, hardware acceleration of machine learning algorithms, memristive computing, and nanoelectronics.

Talk title: Deep Learning with Spiking Neural Nets

Jason K. Eshraghian (Member, IEEE) received the B.Eng. degree in electrical and electrinic engineering and the bachelor's degree in law from The University of Western Australia, Perth, WA, Australia, in 2016, where he also completed the Ph.D. degree. From 2015 to 2016, he was a Research Assistant with Chungbuk National University, South Korea. He is a Postdoctoral Researcher with the Department of Electrical Engineering and Computer Science, University of Michigan in Ann Arbor. His current research interests include neuromorphic computing and spiking neural networks. Dr. Eshraghian is a member of the IEEE Neural Systems and Applications Committee. He was the recipient of the 2019 IEEE Very Large Scale Integration Systems Best Paper Award, and the Best Paper Award at the 2019 IEEE Artificial Intelligence Circuits and Systems Conference for his work in neuromorphic vision.

Talk title: Neurochip applications

Cory Merkel joined the RIT computer engineering department in 2018. He earned his BS and MS degrees in computer engineering (2011) and a Ph.D. in microsystems engineering (2015), all from RIT. From 2016 to 2018, Dr. Merkel was a research electronics engineer with the Information Directorate, Air Force Research Lab. His current research focuses on mapping of AI algorithms, primarily artificial neural networks, to mixed-signal hardware and the design of brain-inspired computing systems using emerging technologies such as memristors. He has published his work in several peer-reviewed conferences, journals, and books, and is also engaged in a number of STEM outreach activities.

Talk title: AI chips consideration in the industry

Manu V Nair currently works as Founder and Chief Executive Officer at Synthara. Synthara offers ultra-low power neural network technologies for multi-sensor applications. As a co-founder and CEO, he leads the business development effort and contribute to the neuromorphic technologies in our portfolio. He has a PhD from Institute of neuroinformatics, ETH Zurich-UZH.

Talk title: Intelligent hardware systems mimicking neural pathways

Chetan Singh Thakur is an Assistant Professor at Indian Institute of Science (IISc), Bangalore, and has an Adjunct Faculty appointment at the International Center for Neuromorphic Systems, Western Sydney University (WSU), Australia. Dr. Chetan Singh Thakur (Senior Member, IEEE) received his Ph.D. in neuromorphic engineering at the MARCS Research Institute, Western Sydney University in 2016 and MTech from the Indian Institute of Technology, Bombay in 2007. He worked as a research fellow at the Johns Hopkins University, USA. In addition, Dr. Thakur has extensive industrial experience. He worked for 6 years with Texas Instruments-Singapore as a senior Integrated Circuit Design Engineer, designing IPs for mobile processors. His research expertise lies in neuromorphic computing, mixed-signal VLSI systems, computational neuroscience, machine learning and edge computing. His research interest is to understand the signal processing aspects of the brain and apply those to build novel intelligent systems. He is the recipient of several awards such as Young Investigator Award from Pratiksha Trust, Early Career Research Award by Science and Engineering Research Board-India, Inspire Faculty Award by Department of Science and Technology- India.

Title: Computational Intelligence for Designing Integrated Circuits and Systems

Jai Narayan Tripathi received the Ph.D. degree in electrical engineering from Indian Institute of Technology Bombay, Mumbai, India, in 2014. He is currently an Assistant Professor at Indian Institute of Technology Jodhpur, Rajasthan, India as well as an Adjunct Research Professor at Carleton University, Ottawa, Canada. In the past, he has worked with STMicroelectronics, India, for almost 7 years, where he was involved in the design issues of various high-speed Systems-on-Chip (SoCs). He was a Visiting Scientist with the Politecnico di Torino, Turin, Italy, in 2016 and 2017, where he was also a Visiting Postdoctoral Fellow, in 2016. He has authored or coauthored over 75 research papers in refereed journals, as book chapters and in the proceedings of international conferences. His current research interests include signal integrity, power integrity, electromagnetic interference/electromagnetic compatibility, metaheuristic optimization, and RF circuits. Dr. Tripathi has served as a TPC Member for over 15 international conferences including the flagship conferences of IEEE EPS society such as EPEPS, EDAPS, etc. He was a recipient of the Young Investigator Training Program Research Award by ACRI, Italy, in 2016 and 2017, consecutively. He was an Invited Speaker in IEEE EDAPS 2015, Seoul, South Korea, where he also served as a Session Co-Chair for the session High-Speed Channels and Interconnects. He has served as a TPC Co-Chair for IEEE EDAPS 2018. He has delivered invited talks at various universities. He is a member of a technical committee TC-12 EDMS of IEEE EPS Society. Dr. Tripathi is working as an Associate Editor for both IEEE Open Journal of Circuits and Systems and IEEE Transactions on Components, Packaging and Manufacturing Technology. He serves as a reviewer for many international journals, such as IEEE TCAS-I: Regular Papers, IEEE TCAS-II: Express Briefs, IEEE TVLSI, IEEE TEMC, IEEE TPES, PIER, Microelectronics Journal, etc. Dr. Tripathi is a Senior Member of IEEE.

Title: Predictive Analytics In Machine Learning For VLSI Circuits

Rajiv V. Joshi is a research staff member and key technical lead at T. J. Watson research center, IBM. He received his B.Tech I.I.T (Bombay, India), M.S (M.I.T) and Dr. Eng. Sc. (Columbia University). Joshi is the original inventor to develop key interconnects processes and structures for aluminum, tungsten and copper technologies which were first released in production by IBM and then used globally in various technologies from sub-0.5µm to 5nm. He has led successfully predictive failure analytic techniques for yield prediction and the technology-driven SRAM at IBM Server Group. His statistical techniques are tailored for machine learning and AI. He commercialized these techniques. He developed novel memory designs in SRAMS, DRAMS, TRAMS, MRAMs which are used in industries. His 8T SRAM and register file techniques (decoupled write and read ports) are prevalently used in electronics industry. He set the pace for high performance memory computing. He received 4 Outstanding Technical Achievement (OTAs), 3 highest Corporate Patent Portfolio awards for licensing contributions, holds 69 invention plateaus, over 250 US and over 400 including international patents. His patents cover fields such as technology (eg. Front end devices - SOI, FinFETS, back end of the line – interconnects, Predictive analytics as applied to bigdata and yield analysis, high bandwidth memories and AI). He has authored and co-authored over 210 papers. He has given over 50 invited/keynote talks and given several Seminars. NY IP Law association awarded him as the “Inventor of the year” in Feb 2020. He received prestigious IEEE Daniel Noble award in 2018. Also he is the recipient of the Best Editor Award from IEEE TVLSI journal and 2015 BMM award. He is inducted into New Jersey Inventor Hall of Fame in Aug 2014 along with pioneer Nicola Tesla. He is a recipient of 2013 IEEE CAS Industrial Pioneer award and 2013 Mehboob Khan Award from Semiconductor Research Corporation. He was given the same award again in 2020 for AI initiatives in BRIC program funded by SRC. He won several best paper awards from ISSCC 1992, ICCAD 2012, ISQED, VMIC. He is a member of IBM Academy of technology and a master inventor. He served as a Distinguished Lecturer for IEEE CAS and EDS society. He is currently Distinguished Lecturer for CEDA. He is IEEE, ISQED and World Technology Network fellow and distinguished alumnus of IIT Bombay. He serves in the Board of Governors for IEEE CAS as industrial liaison. He serves as an Associate Editor of TVLSI. He will and has served on committees of DAC 2019, AICAS 2019, ISCAS, ISLPED (Int. Symposium Low Power Electronic Design), IEEE VLSI design, IEEE CICC, IEEE Int. SOI conference, ISQED and Advanced Metallization Program committees. He initiated IBM CAS EDS symposium at IBM in 2017 and will continue into 2018 with Artificial Intelligence as the focal area. He served as a general chair for IEEE ISLPED. He is an industry liaison for universities as a part of the Semiconductor Research Corporation. Also he is in the industry liaison committee for IEEE CAS society.